POK(kernelpart)
/home/jaouen/pok_official/pok/trunk/kernel/arch/sparc/space.h File Reference
#include <types.h>

Go to the source code of this file.

Defines

#define LEON_CTX_NBR   256
PTD/PTE ET field

(cf SPARC V8 Manual, page 247)

#define MM_ET_INVALID   0x0
#define MM_ET_PTD   0x1
#define MM_ET_PTE   0x2
PTE ACC field

Acces permisions. (cf SPARC V8 Manual, page 248)

#define MM_ACC_R   (0x0 << 2)
#define MM_ACC_RW   (0x1 << 2)
#define MM_ACC_RE   (0x2 << 2)
#define MM_ACC_RWE   (0x3 << 2)
#define MM_ACC_E   (0x4 << 2)
#define MM_ACC_R_S_RW   (0x5 << 2)
#define MM_ACC_S_RE   (0x6 << 2)
#define MM_ACC_S_RWE   (0x7 << 2)
PTE misc fields

(cf SPARC V8 Manual, page 248)

#define MM_CACHEABLE   (1 << 7)
#define MM_MODIFIED   (1 << 6)
#define MM_REFERENCED   (1 << 5)
MMU levels utils
#define MM_LVL1_ENTRIES_NBR   256
#define MM_LVL1_PAGE_SIZE   (64 * 64 * 4 * 1024)
#define mm_index1(addr)   (((addr) >> 24) & 0xFF)
#define MM_LVL2_ENTRIES_NBR   64
#define MM_LVL2_PAGE_SIZE   (64 * 4 * 1024)
#define mm_index2(addr)   (((addr) >> 18) & 0x3F)
#define MM_LVL3_ENTRIES_NBR   64
#define MM_LVL3_PAGE_SIZE   (4 * 1024)
#define mm_index3(addr)   (((addr) >> 12) & 0x3F)
MMU ASI and registers
#define ASI_M_MMUREGS   0x19 /* not sparc v8 compliant */
#define MMU_CTRL_REG   0x00000000
#define MMU_CTXTBL_PTR   0x00000100
#define MMU_CTX_REG   0x00000200
#define MMU_FAULT_STATUS   0x00000300
#define MMU_FAULT_ADDR   0x00000400

Typedefs

typedef uint32_t pte
typedef uint32_t ptd

Functions

void pok_arch_space_init (void)

Detailed Description

Author:
Fabien Chouteau

Definition in file space.h.


Define Documentation

#define ASI_M_MMUREGS   0x19 /* not sparc v8 compliant */

Definition at line 97 of file space.h.

#define LEON_CTX_NBR   256

Maximum number of contexts

Definition at line 105 of file space.h.

#define MM_ACC_E   (0x4 << 2)

All Execute only

Definition at line 46 of file space.h.

#define MM_ACC_R   (0x0 << 2)

All Read only

Definition at line 42 of file space.h.

#define MM_ACC_R_S_RW   (0x5 << 2)

User Read only, Supervisor Read Write

Definition at line 47 of file space.h.

#define MM_ACC_RE   (0x2 << 2)

All Read Execute

Definition at line 44 of file space.h.

#define MM_ACC_RW   (0x1 << 2)

All Read Write

Definition at line 43 of file space.h.

#define MM_ACC_RWE   (0x3 << 2)

All Read Write Execute

Definition at line 45 of file space.h.

#define MM_ACC_S_RE   (0x6 << 2)

Supervisor Read Write Execute

Definition at line 49 of file space.h.

#define MM_ACC_S_RWE   (0x7 << 2)

Supervisor Read Execute

Definition at line 50 of file space.h.

#define MM_CACHEABLE   (1 << 7)

Definition at line 58 of file space.h.

#define MM_ET_INVALID   0x0

Invalid

Definition at line 32 of file space.h.

#define MM_ET_PTD   0x1

Page Table Descriptor

Definition at line 33 of file space.h.

#define MM_ET_PTE   0x2

Page Table Entry

Definition at line 34 of file space.h.

#define mm_index1 (   addr)    (((addr) >> 24) & 0xFF)

Compute the index in 1st level table for the given adress.

Definition at line 73 of file space.h.

#define mm_index2 (   addr)    (((addr) >> 18) & 0x3F)

Compute the index in 2nd level table for the given adress.

Definition at line 81 of file space.h.

#define mm_index3 (   addr)    (((addr) >> 12) & 0x3F)

Compute the index in 3rd level table for the given adress.

Definition at line 89 of file space.h.

#define MM_LVL1_ENTRIES_NBR   256

Number of entries in 1st level table

Definition at line 67 of file space.h.

#define MM_LVL1_PAGE_SIZE   (64 * 64 * 4 * 1024)

16 MegaBytes

Definition at line 68 of file space.h.

#define MM_LVL2_ENTRIES_NBR   64

Number of entries in 2nd level table

Definition at line 75 of file space.h.

#define MM_LVL2_PAGE_SIZE   (64 * 4 * 1024)

256 KiloBytes

Definition at line 76 of file space.h.

#define MM_LVL3_ENTRIES_NBR   64

Number of entries in 3rd level table

Definition at line 83 of file space.h.

#define MM_LVL3_PAGE_SIZE   (4 * 1024)

4 KiloBytes

Definition at line 84 of file space.h.

#define MM_MODIFIED   (1 << 6)

Definition at line 59 of file space.h.

#define MM_REFERENCED   (1 << 5)

Definition at line 60 of file space.h.

#define MMU_CTRL_REG   0x00000000

Definition at line 98 of file space.h.

#define MMU_CTX_REG   0x00000200

Definition at line 100 of file space.h.

#define MMU_CTXTBL_PTR   0x00000100

Definition at line 99 of file space.h.

#define MMU_FAULT_ADDR   0x00000400

Definition at line 102 of file space.h.

#define MMU_FAULT_STATUS   0x00000300

Definition at line 101 of file space.h.


Typedef Documentation

typedef uint32_t ptd

Definition at line 108 of file space.h.

typedef uint32_t pte

Definition at line 107 of file space.h.


Function Documentation

void pok_arch_space_init ( void  )

Initilize MMU tables.

Definition at line 132 of file space.c.

{
  uint32_t sdr1;

  pt_base = 0;
  pt_mask = 0x3ff;

  sdr1 = pt_base | (pt_mask >> 10);
  asm volatile ("mtsdr1 %0" : : "r"(sdr1));
}